Block diagram of the Frequency Synthesizer

Oscillators used in RF transceivers are usually embedded in a synthesizer environment to precisely define their output frequency. The oscillator used is not as stable as desired and might show drift caused by environmental factors. Making use of a PLL-like structure to lock the oscillator to a more stable Xtal at 2MHz, we can decrease the drift significantly and correct the phase of the output signal. 


Overview of the Frequency Synthesizer design:


The Synthesizer exists of three parts:

  • Crystal Oscillator (2MHz)
  • Frequency Divider (/2)
  • Phase comparator

The Oscillator and Mixer are not part of the scope here.


Crystal Oscillator

Pierce Xtal oscillator, a lot of trial and error in choosing the right components for the correct frequency. The NOT gate is needed for the 180* phase difference to satisfy the Barkhausen criteria and keep the oscillator running. a single CD4007 IC is needed to construct the NOT gate.


Frequency Divider

A D-flipflop with Q_bar connected to CLK. The circuit uses 4 NAND gates and 1 NOT gate, making use of 4 CD4007 ICs in total


Phase Comparator

The phase comparator is an XOR gate, comparing the input signals in a XOR fasion. The XOR gate needs 4 NAND gates to operate, thus 4 ICs are needed



The gates are constructed using the CD4007 IC, below is a depiction of a NAND gate constructed from 2 transistor totempoles/NMOS-PMOS pairs


a NOT gate is constructed using a single totempole


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